The present invention relates to printers, and particularly to printer control circuitry which processes data received from a computer or other word processor into a form suitable for transmission to a marking engine.
It is known that the overall operating speed of a word processing system is limited by the system printer and there is, accordingly, a continuing demand for printers capable of operating at ever higher speeds. Moreover, as new applications software is developed, there is a continuing demand for printers having increased flexibility with respect to the types of images which they can produce.
The control systems for such printers are generally constructed on the basis of bus architecture in which a plurality of individual system devices, including memories, timers, CPUs, etc., are connected for transfer of signals via a system bus. This arrangement offers the advantage of enabling any pair of devices to communicate with one another under software control. Since only one group of signals at a time can be conducted over a bus, special control devices, known as arbiters, are provided to resolve priority of simultaneous requests to access the bus by multiple bus masters.
While systems have been developed which enable the bus to be employed in a highly efficient manner, the fact that a bus can conduct only one set of signals at a time places an inherent upper limit on the operating speed of such a control system. The effect of the upper limit becomes more pronounced as improvements are produced in the operating speed of the printer marking engine, or print engine, which is the most critical moving part of the printer.